Electronic circuits, such as integrated circuits, are used in a variety of products, from automobiles to smart phones to personal computers. Designing and fabricating these circuit devices typically involves many steps, known as a “design flow.” The particular steps of a design flow often are dependent upon the type of integrated circuit being designed, its complexity, the design team, and the integrated circuit fabricator or foundry that will manufacture the circuit. Typically, software and hardware “tools” will verify a design at various stages of the design flow by running software simulators and/or hardware emulators/prototyping devices. The verification processes then are used to identify and correct errors in the design.
The verification processes may also include debugging software programs. Today's system-on-chip (SoC) designs aren't just hardware anymore. In the past, the creation of hardware circuit chips was separate from the creation of the software to be executed on those circuit chips, but today an SoC isn't complete until the intended software has been proven to work—and to work well—on the platform.
Several steps are common to most design flows. Typically, the specification for the new circuit initially is described at a very abstract level as a logical design. An example of this type of abstract description is a register transfer level (RTL) description of the circuit. With this type of description, the circuit is defined in terms of both the exchange of signals between hardware registers and the logical operations that are performed on those signals. A register transfer level design typically employs a Hardware Description Language (HDL) (sometimes also referred to as hardware design language or hardware definition language), such as the Very high speed integrated circuit Hardware Description Language (VHDL) or the Verilog language. The logic of the circuit is then analyzed, to confirm that the logic incorporated into the design will accurately perform the functions desired for the circuit. This analysis is sometimes referred to as “functional verification.”
Logic simulation is a tool used for functional verification. Designing hardware today involves writing a program in the hardware description language. A simulation may be performed by running that program on a computer. Such an electronic design simulator can determine what the various states of an electronic design would be when presented with some input stimulus. Simulators are commercially available such as the QUESTA family of simulators from Mentor Graphics Corporations of Wilsonville, Oreg.
Software-based simulation, however, may be too slow for large complex designs such as SoC (System-on-Chip) designs. The speed of execution of a simulator drops significantly as the design size increases due to cache misses and memory swapping. Emulation and prototyping significantly increase verification productivity by employing reconfigurable hardware modeling devices including emulators and prototyping devices. Field programmable gate arrays (FPGAs)-based emulators and prototyping devices rely on an actual silicon implementation and perform circuit verification generally in parallel as the circuit design will execute in a real device. By contrast, a simulator performs circuit verification by executing the hardware description code serially. The different styles of execution can lead to orders of magnitude differences in execution time. Examples of hardware emulators include the VELOCE family of emulators available from Mentor Graphics Corporation of Wilsonville, Oreg., the ZEBU family of emulators available from Synopsys, Inc. of Mountain View, Calif., and the PALLADIUM family of emulators available from Cadence Design Systems of San Jose, Calif.
Verifying some circuit designs requires capturing and analyzing messages transmitted between circuit models for these designs and devices they communicated with (often referred to as targets). The communication usually employs a well-defined format or a particular set of rules, which is referred to as a protocol. Multiple protocols may describe different aspects of a single communication. A protocol can be a standard protocol, which has the overwhelming support and agreement of a standards making body, or a user-defined protocol. Examples of standard protocols include PCIe (a protocol for the high-speed serial computer expansion bus standard PCIe), NVMe (a protocol for an open logical device interface specification for accessing non-volatile storage media attached via a PCIe bus), SATA/SAS (a point-to-point serial protocol that moves data to and from computer-storage devices such as hard drives, optical drives, and solid-state drives), USB (a protocol for connection, communication, and power supply between computers and devices through Universal Serial Bus), UFS (a protocol for a common flash storage specification for digital cameras, mobile phones and consumer electronic devices), CAN (a message-based protocol for a bus standard designed to allow microcontrollers and devices to communicate with each other in applications without a host computer), LIN (a serial network protocol used for communication between components in vehicles), Ethernet (a protocol for local area networks (LAN), metropolitan area networks (MAN) and wide area networks (WAN)), Memory DDR (a protocol for Double Data Rate (DDR) memory interface), and Flash Memory (a protocol for flash memory interface).
To capture and analyze messages conforming to different protocols during a circuit design verification process, different protocol analyzers are typically employed. With so many existing protocols and with more new protocols are under development, a generic protocol analyzer that can be made to work with various protocols easily and quickly is highly desirable.